Relay driver with automatic time distortion compensation

ABSTRACT

In combination with a relay, a driving circuit in which the relay drop in and drop out times are made equal in response to abrupt and correspondingly occurring changes of input signal level. An arrangement of active sensing and biasing elements delays the actual opening or closing of the relay by charging up a capacitor to different predetermined levels and requiring the change of state to occur well within the capacitor charging times independent of the initial closure state.

United States Patent Inventors Appl. No.

Filed Patented Assignee Priority Jean Claude Grange Cagnes sur Mer;

Philippe Henri Hernandez, Nice, both of, France Aug. 24, 1970 Aug. 17, 1971 International Business Machines Corporation Armonk, N.Y.

Sept. 16, 1969 France RELAY DRIVER WITH AUTOMATIC TIME DISTORTION COMPENSATION 6 Claims, 2 Drawing Figs.

[1.8. CI ..3l7/ 148.5 R, 3l7/l5l, 307/294, 3 l7/DIG. 6

Int. Cl .l H01h 47/32 Field 0! Search 3 l7/DIG. 6,

[56] References Cited UNITED STATES PATENTS 3,275,899 9/1966 Wolf........,.4 3l7/DIG.6 3,3l 1,796 3/l967 Mercer lll 3 l7/DIG. 6 OTHER REFERENCES Gindi, Hammer Driver, IBM Technical Disclosure Bulletin, Vol 4, N0. 11, April 1962 page 52 Primary Examiner-- Lee T. Hix 4ttorneys- Hanifin and Jancin and Robert Bruce Brodie ABSTRACT: In combination with a relay, a driving circuit in which the relay drop in and drop out times are made equal in response to abrupt and correspondingly occurring changes of input signal level. An arrangement of active sensing and biasing elements delays the actual opening or closing of the relay by charging up a capacitor to different predetermined levels and requiring the change of state to occur well within the capacitor charging times independent of the initial closure state.

PATENTED AUG 1 7 I97! INPUT I CLOSE RELAY OPEN RELAY RELAY DRIVER WITH AUTOMATIC TIME DISTORTION COMPENSATION BACKGROUND OF THE lNvsm'lou This invention relates to a circuit for compensating for the unequal transition times occurring in abistable remanent device such as a pulse driven magnetically actuable relay.

It is well known that a relay is made of anelectric coil surrounding a pair of magnetically responsive contactelements. The sending of current pulses through the coil controls the opening and closure of such relay contacts. Pulse control relays for example have an asymmetrical response for opening and closing of the contacts. That is, the opening and closure times are unequal.

' In the prior art, the compensation and correction for this condition has been based on mechanical action. More precise solutions have included changing the electronic circuitry of the relay driver. This consists in either delaying or accelerating the operation of the pulse driver'rrelay due to the use of energy previously stored and used during the command for supplying current to the coil of the relayQReference is made to IBM Technical Disclosure Bulletin, Volume ll, Number ll, Apr., 1969, at page 1,403 for the description of a solenoid driver circuit in which the switching time is decreased. However, the distortion resulting from the unequal rise and fall times is still present. This lack of compensation results from the fact that the action of the correction circuit is dependent on the initial state of the relay. Restated, the compensation circuit is responsive to either the leading or trailing edge of the electric control signal and varies in its'timed response as a function of the relay closure state.

It is accordingly an object of this invention to devise a circuit for compensating for the unequal transition times between the stable states'in a bistable remanent device actuated by abrupt changes of input signal levels.

It is arnore specific object of this invention to devise an electronic relay driver with whichit is possible to obtain an automatic and symmetrical compensation for the time distortions due to the responses of the relay.

SUMMARY OF THE INVENTION The foregoing objects are satisfied in an embodiment using a charge storage element as a part of the circuit for automatically compensating of the unequal transition times in a bistable remanent device such as a relay. The circuit includes means responsive to abrupt changes of the input signal level for charging up the storage means, and means for energizing the relay coil to change the relay state when the capacitor is charged up to a predetermined threshold.

In this invention, it is necessary to charge the storage element from a first to a second threshold level at a first time constant in response to a first input signal change. The storage element is additionally charged from 'a second to a third threshold level at a second time constant. The relay is actuated and completes its transition from the first to the second stable state during the second to third threshold level charging time. Similarly, the storage element is charged from the third to second threshold level at the second time constant when subjected to another abrupt input signal change, the charging continuing from the second to the first threshold level at the first time constant. The relay transition from the second to the first stable state occurs during the second to first threshold level charging time. As a consequence, the drop in-drop'out relay characteristics prove quite symmetrical with this form of compensation, and occur independent of whether the relay is initially opened or closed with reference to the applied control pulse.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. I is a schematic diagram of the solenoid driver circuit, including the relay coil and relay contact positions.

FIG. 2, is a timing diagram of wave forms appearing at selected nodes in the circuit shown in FIG. 1.

DESCRIPTION OF THE PREFERRED EMBODIMENT Referring now to FIG. I of the drawing, there is shown a circuit for driving relay 'coil 8,. The relay is closed-circuited when the contact is in position B and open-circuited when the contact is in position A. The relay 8,, is pulsed open or closed when driven by an input current applied at l to the base of transistor T, through diode D, and resistor R,,,.

Transistors T,, T and T, used in the circuit for sensing and biasing are of the NPN type. They are all driven in the common emitter mode.

Now looking at the circuit construction, the collector of I transistor T, is connected to the cathode of diode D and the anode of diode D Also, the collector of transistor T, is connected to a positive potential source +V through resistor R Transistor T, is biased on when potential V, is maintained by resistive voltage dividers R, and R,,. The signal at the collector of T, in turn drives the base of transistor T Unlike the other transistors, T, is of the PNP type, the emitter of which being coupled to the battery source +V. The collector of T, is connected to a test tapping point L through resistor R-,.

A voltage divider formed from resistors R, and R couples the collector of T, to the base of transistor T The collector of T, is loaded by the solenoid coil-relay winding B In this invention, a capacitor stores an amount of energy proportional to the preceding switching time of the relay and to the delay in the execution of the applied command. Significantly, this circuit arrangement delays the open-close relay command over a time interval equivalent to the preceding switching time before applying the current pulse to the relay coil.

Capacitor C is coupled between ground and node E. Node E joins the anodes of diodes D, and D, together withthe cathode of D Resistor R, couples the anode of D, to a node formed from the cathodes of D, and D D, and R, are of course coupled to the collector of T,. a

When the relay contact is closed or in the make contact position at point B battery voltage C is applied to the anodes of diodes D,, D, and D,, the latter two through resistor R Referring again to FIG. I, assume that capacitor C is charged up to voltage V through resistors R and R,,.'Furthermore, assume that transistors T,',' T,, T, and T, are nonconducting and in the absence of a driving current encoiled E the relay contact is in open position A. When a positive going pulseis applied at input I, transistor T, becomes conductive and transistors T T and T, go into saturation. Consequently, current is driven into coil 8,, and the relay contact moves from open position A to closed position B. In the time interval between the application of the pulse leading edge at input I, and the movement of the relay from position A to position B, diode D is blocked. Capacitor C is discharged through D,, R,, T, with a time constant R, C until the relay contact actually assumes position B.

Referring now to FIG. 2 of the drawing, there is shown a timing and wave form diagram relating the current and voltage wave shapes at various portions of the circuit. Thus, input I is figuratively represented as a step function leading edge applied at time t The voltage at node E (a cross-capacitor C) begins discharging with the time constant R,C. At time 1, (representing the closure of the relay) B, is blocked due to the back biasing of the diode by the application of battery voltage V through diode D,. In efi'ect, at time t, capacitor C is clamped at this discharge voltage for the duration of the input pulse at I. It should be noted, that capacitor C is discharged by an amount proportional to the time necessary for the relay to pass from an open to a closed condition.

At time t,, the input pulse terminates. This is equivalent to a command for opening the relay. At this time, T, becomes open-circuited, while T, is having a charge storage characteristic in effect still conducts due to a discharge path provided by conductingtransistors T, and T At the instant transistor T is cut off and with the relay instantaneously in the closed B position, capacitor C is charged in the direction towards battery voltage V through path D,, R, and D,,. As soon as the voltage at point B becomes equal to the voltage V D, becomes conducting and T T and Law turned off. At this instant, diode D is opened and capacitor C becomes charged through R D and D Also C is charged through D,, R, and D Thus, C is charged with a time constant equal to R'C, where R is equivalent to R, and R all over R R This charge-up pattern continues until timet when the relay contact open circuits The time interval is called the release time T v 7 Referring again to FIGS. 1 and 2, at the time marked T.,, a positive going input pulse is applied at point] seeking to close the relay. At this instant T becomes conducting and capacitor C becomes discharged through a pair of parallel paths. The first path is formed by D R D and T,. The second path 4 formed from D,, R and 4 1. This discharge takes place with a time constant equal to R'C where R is equivalent to R R all At the instant t the charge on capacitor C approximates V T is conducting and this causes T T and T to go into such ration thereby. At this point, current is applied to the coil B causing relay contact to move from the opencircuit position A towards the closed circuit position 8. Consequently, capacitor C goes on discharging through D,, R, and T until instant t The charging path time constant for the I interval between t, and 1 is R,C. Once again the interval t,,t -,is the relay tum-on time T and is equal to 1 -2,. When the relay contact reaches position B at time t capacitor C is clamped at a voltage slightly less than V, due to the biasing action of the battery +V through diode D Eiicept, for the initial operation of the relay, all of the negative going or relay opening commands are delayed over a period T whereas all of the relay closing or positive input going pulses are delayed over a period T,,,,. This shows a perfectly symmetrical compensation for the relay response.

It should be noted, that the described compensation arrangement is not limited to either relays, or reactive loads. Any system requiring that successive transition timesbe made equal in response to successive stepped inputs can employ this invention.

, While the invention has been particularly shown and described with reference to a relay embodiment, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention.

What is claimed is:

1. A circuit for automatic compensation of unequal transition times in a bistable remanent device comprising:

a charge storage element;

means responsive to a first input signal for chargingthe storage element from a first to a second threshold level at a first time constant, and from a second to a third threshold level at a second time constant; means for executing the transition from the first to second stable state during the second to third threshold level charging time; I meansresponsive to a second input signal for charging the storage element from the thirdfto second threshold level at the second time constant and from the second to first threshold level at the first time constant; and means forexecuting the transition from the second to the first stable state during the second to first threshold level charging time. v

2. A circuit according to claim 1, wherein the bistable remanent device comprises a magnetically operable relay capable of assuming either an open or closed state.

3. In combination with a device capable of assuming one of at least two stable states and responsive to the abrupt application of corresponding input signal levels, a circuit for compensating the device for the unequal transition times between the stable states comprising:

charge storagemeans; means responsive to a first input signal level for charging the storage means from a first to a second threshold level at a first time constant; p means responsive to the second threshold level for energizing the device to change from a first to a second stable state, and including means for charging the storage means from the second to a third threshold level at a second time constant; I means responsive to a second input signal level for charging the storage means from the third to the second threshold level at the second time constant; and means responsive to the second threshold level for energizing the device tochange from the second to the first stable state, and including'means for charging the storage means from the second to the first threshold level at the first time constant. 4. A circuit according to claim 3, wherein the first time-constant is substantially less than the second time constant.

5. The device of the combination set forth in claim 3 comprises a magnetically operable relay.

6. In combination with a solenoid circuit, an arrangement for making transition time within which the solenoid drops in or drops out equal in response to abrupt and corresponding changes of input signal level comprising: 

1. A circuit for automatic compensation of unequal transition times in a bistable remanent device comprising: a charge storage element; means responsive to a first input signal for charging the storage element from a first to a second threshold level at a first time constant, and from a second to a third threshold level at a second time constant; means for executing the transition from the first to second stable state during the second to third threshold level charging time; means responsive to a second input signal for charging the storage element from the third to second threshold level at the second time constant and from the second to first threshold level at the first time constant; and means for executing the transition from the second to the first stable state during the second to first threshold level charging time.
 2. A circuit according to claim 1, wherein the bistable remanent device comprises a magnetically operable relay capable of assuming either an open or closed state.
 3. In combination with a device capable of assuming one of at least two stable states and responsive to the abrupt application of corresponding input signal levels, a circuit for compensating the device for the unequal transition times between the stable states comprising: charge storage means; means responsive to a first input signal level for charging the storage means from a first to a second threshold level at a first time constant; means responsive to the second threshold level for energizing the device to change from a first to a second stable state, and including means for charging the storage means from the second to a third threshold level at a second time constant; means responsive to a second input signal level for charging the storage means from the third to the second threshold level at the second time constant; and means responsive to the second threshold level for energizing the device to change from the second to the first stable state, and including means for charging the storage means from the second to the first threshold level at the first time constant.
 4. A circuit according to claim 3, wherein the first time constant is substantially less than the second time constant.
 5. The device of the combination set forth in claim 3 comprises a magnetically operable relay.
 6. In combination with a solenoid circuit, an arrangement for making transition time within which the solenoid drops in or drops out equal in response to abrupt and corresponding changes of input signal level comprising: charge storage means; means responsive to each abrupt change of the inPut signal level for charging up the storage means; and means for energizing the solenoid to change its state when the storage means is charged up to a predetermined threshold. 